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Our portfolio spans across multiple disciplines, including engineering, technology, medicine, and social sciences, providing cutting-edge insights for researchers, academics, and professionals.  We work with experts and thought leaders to deliver timely, relevant, and peer-reviewed resources. Our reputation for quality and integrity ensures that River Publishers is a trusted partner in academic and professional research.\u003C/p>","2024-12-17T14:49:40.685Z","2025-01-10T19:01:28.716Z","2024-12-17T14:49:42.364Z","319",{"id":1496,"name":1497,"alternativeText":16,"caption":16,"width":1498,"height":1499,"formats":1500,"hash":1524,"ext":19,"mime":20,"size":1525,"url":1526,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1527,"updatedAt":1527},246,"ISCAS_2025_Patron-Logos_River Publishers.png",2148,1004,{"large":1501,"small":1507,"medium":1513,"thumbnail":1518},{"ext":19,"url":1502,"hash":1503,"mime":20,"name":1504,"path":16,"size":1505,"width":787,"height":1506},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/large_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48.png","large_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48","large_ISCAS_2025_Patron-Logos_River Publishers.png",51.68,467,{"ext":19,"url":1508,"hash":1509,"mime":20,"name":1510,"path":16,"size":1511,"width":736,"height":1512},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48.png","small_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48","small_ISCAS_2025_Patron-Logos_River Publishers.png",25.02,234,{"ext":19,"url":1514,"hash":1515,"mime":20,"name":1516,"path":16,"size":335,"width":743,"height":1517},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/medium_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48.png","medium_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48","medium_ISCAS_2025_Patron-Logos_River Publishers.png",351,{"ext":19,"url":1519,"hash":1520,"mime":20,"name":1521,"path":16,"size":1522,"width":805,"height":1523},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48.png","thumbnail_ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48","thumbnail_ISCAS_2025_Patron-Logos_River Publishers.png",12.53,115,"ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48",19.18,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/ISCAS_2025_Patron_Logos_River_Publishers_1e9b781b48.png","2024-12-17T14:49:30.859Z",{"id":1290,"variation":757,"button":1529},[1530],{"id":1531,"label":761,"size":762,"color":763,"style":16,"icon":764,"iconPosition":765,"url":1532,"newWindow":8,"downloadable":16,"shape":16},101,"http://www.riverpublishers.com/","-198",{"id":620,"name":1535,"description":1536,"createdAt":1537,"updatedAt":1538,"publishedAt":1539,"url_path_id":1540,"logo":1541,"website":1573,"url_path":1578},"Cirrus Logic","\u003Cp style=\"text-align:justify;\">Founded in 1984 in Silicon Valley, Cirrus Logic is a leader in low-power, high-precision, mixed-signal processing solutions. Leveraging a broad portfolio of hardware, software and proprietary algorithms, Cirrus Logic excels at developing IP-rich solutions that create innovative user experiences for the world’s top mobile and consumer applications. Cirrus Logic has approximately 3,940 issued and pending patents worldwide and counting.\u003C/p>\u003Cp style=\"text-align:justify;\">Cirrus Logic is a recognized leader in low-power, high-precision, mixed-signal audio solutions that include products such as smart codecs, audio DSPs, boosted amplifiers, haptic and sensing ICs, camera controllers, battery and power ICs, analog-to-digital converters (“ADCs”), digital-to-analog converters (“DACs”), codecs that integrate ADCs and DACs into a single IC, digital interface ICs and power stages. Our products are used in a wide array of consumer applications, including smartphones, tablets, laptops, digital headsets, wearables, Bluetooth speakers, and smart home accessories.\u003C/p>","2024-12-18T13:52:37.376Z","2024-12-18T18:34:48.482Z","2024-12-18T13:52:39.678Z","320",{"id":1542,"name":1543,"alternativeText":16,"caption":16,"width":1544,"height":1545,"formats":1546,"hash":1569,"ext":19,"mime":20,"size":1570,"url":1571,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1572,"updatedAt":1572},249,"ISCAS_2025_Patron-Logos_cirrus-logic.png",1491,264,{"large":1547,"small":1553,"medium":1558,"thumbnail":1564},{"ext":19,"url":1548,"hash":1549,"mime":20,"name":1550,"path":16,"size":1551,"width":787,"height":1552},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/large_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35.png","large_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35","large_ISCAS_2025_Patron-Logos_cirrus-logic.png",35.81,177,{"ext":19,"url":1554,"hash":1555,"mime":20,"name":1556,"path":16,"size":1557,"width":736,"height":860},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35.png","small_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35","small_ISCAS_2025_Patron-Logos_cirrus-logic.png",15.47,{"ext":19,"url":1559,"hash":1560,"mime":20,"name":1561,"path":16,"size":1562,"width":743,"height":1563},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/medium_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35.png","medium_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35","medium_ISCAS_2025_Patron-Logos_cirrus-logic.png",25.11,133,{"ext":19,"url":1565,"hash":1566,"mime":20,"name":1567,"path":16,"size":1568,"width":805,"height":160},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35.png","thumbnail_ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35","thumbnail_ISCAS_2025_Patron-Logos_cirrus-logic.png",6.7,"ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35",8.8,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/ISCAS_2025_Patron_Logos_cirrus_logic_7e45301a35.png","2024-12-18T13:52:21.065Z",{"id":1251,"variation":757,"button":1574},[1575],{"id":1576,"label":761,"size":762,"color":763,"style":16,"icon":764,"iconPosition":765,"url":1577,"newWindow":8,"downloadable":16,"shape":16},102,"http://cirrus.com/","-199",{"id":259,"name":1580,"description":1581,"createdAt":1582,"updatedAt":1583,"publishedAt":1584,"url_path_id":1585,"logo":1586,"website":1607,"url_path":1612},"Applied Materials","\u003Cp style=\"text-align:justify;\">We are the leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. At Applied Materials, our innovations Make Possible® a Better Future.\u003C/p>","2025-01-14T21:18:16.987Z","2025-01-14T21:18:19.761Z","2025-01-14T21:18:19.748Z","345",{"id":1587,"name":1588,"alternativeText":16,"caption":16,"width":1589,"height":1590,"formats":1591,"hash":1603,"ext":781,"mime":784,"size":1604,"url":1605,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1606,"updatedAt":1606},261,"AppliedWebLogoEnglish102021.jpg",525,187,{"small":1592,"thumbnail":1597},{"ext":781,"url":1593,"hash":1594,"mime":784,"name":1595,"path":16,"size":1596,"width":736,"height":1348},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_Applied_Web_Logo_English102021_cd0b2bb837.jpg","small_Applied_Web_Logo_English102021_cd0b2bb837","small_AppliedWebLogoEnglish102021.jpg",11.68,{"ext":781,"url":1598,"hash":1599,"mime":784,"name":1600,"path":16,"size":1601,"width":805,"height":1602},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_Applied_Web_Logo_English102021_cd0b2bb837.jpg","thumbnail_Applied_Web_Logo_English102021_cd0b2bb837","thumbnail_AppliedWebLogoEnglish102021.jpg",4.69,87,"Applied_Web_Logo_English102021_cd0b2bb837",11.64,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/Applied_Web_Logo_English102021_cd0b2bb837.jpg","2025-01-14T21:16:57.312Z",{"id":1334,"variation":757,"button":1608},[1609],{"id":1610,"label":761,"size":762,"color":763,"style":16,"icon":764,"iconPosition":765,"url":1611,"newWindow":8,"downloadable":16,"shape":16},103,"https://www.appliedmaterials.com/us/en.html","-221",{"id":280,"name":1614,"description":1615,"createdAt":1616,"updatedAt":1617,"publishedAt":1618,"url_path_id":1619,"logo":1620,"website":1629,"url_path":1635},"ASML","\u003Cp style=\"text-align:justify;\">As one of the world’s leading manufacturers of chip-making equipment, ASML provides its customers with tools - hardware, software and services - to create the patterns that define the electronic circuits on a chip. As we improve our products, our customers can increase the value and reduce the cost of chips for their customers.\u003C/p>\u003Cp style=\"text-align:justify;\">We are a global company with over 40,000 employees. Our thousands of engineers work in multi-disciplinary teams and with a network of suppliers and technology partners, innovating to maintain our technology leadership. We set ourselves ambitious goals and take pride in the impact we have on the world around us.\u003C/p>","2025-01-21T16:28:06.652Z","2025-01-21T16:28:08.471Z","2025-01-21T16:28:08.464Z","346",{"id":1621,"name":1622,"alternativeText":16,"caption":16,"width":1623,"height":1624,"formats":16,"hash":1625,"ext":33,"mime":34,"size":1626,"url":1627,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1628,"updatedAt":1628},266,"ASML_Holding_N.V._logo (1).svg",1065,300,"ASML_Holding_N_V_logo_1_85c2099fcf",3.33,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/ASML_Holding_N_V_logo_1_85c2099fcf.svg","2025-01-21T16:28:04.069Z",{"id":1630,"variation":757,"button":1631},86,[1632],{"id":1633,"label":761,"size":762,"color":763,"style":16,"icon":764,"iconPosition":765,"url":1634,"newWindow":8,"downloadable":16,"shape":16},104,"https://www.asml.com/","-222",{"pagination":1637},{"page":5,"pageSize":280,"pageCount":47,"total":554},{"id":238,"heading":233,"pageHeader":1639,"sections":1641},{"id":238,"description":1640,"showPageHeader":8,"backgroundColor":49,"image":16}," ",[1642],{"id":5,"__component":1643,"componentVariation":1644,"contactsVariation":1645,"styles":16,"header":16,"sessionsGroup":1646},"content.sessions","Sessions Base","Card Contact Full",[1647],{"id":5,"groupTitle":16,"sessions":1648},[1649,1701,1750,1798,1847],{"id":89,"session":1650},{"id":89,"title":1651,"teaser":1652,"body":1653,"createdAt":1654,"updatedAt":1655,"publishedAt":1656,"url_path_id":1657,"contacts":1658,"url_path":1700},"Can Silicon Learn Continually?","\u003Ch4 class=\"h4\" style=\"margin-left:0px;text-align:justify;\">\u003Cspan style=\"color:#8A2432;\">\u003Cstrong>Monday | May 26, 2025 | 9:00 - 10:00\u003C/strong>\u003C/span>\u003C/h4>\u003Cp style=\"text-align:justify;\">Imagine a silicon chip that can seamlessly adapt to any environment, excel across different tasks, and operate with limited energy—all without exhausting its memory. This capability, known as continual learning, enables the chip to learn continuously from evolving data, while excelling at past, current, and future skills simultaneously. \u003C/p>\u003Cp style=\"text-align:justify;\">Although such adaptability is quite natural for biological agents, such as humans, achieving it in traditional machine learning models has proven quite challenging. Biological brains appear to have evolved to learn continually through their lifetimes, drawing power as low as ∼ 0.1 watts of Adenosine 5’-Triphosphate (ATP) for cortical computation.\u003C/p>","\u003Cp style=\"text-align:justify;\">This encourages exploration of neural processing principles as an inspiration to design energy-efficient continual learning machines. Examples include continual learning algorithms with metaplasticity and synaptic consolidation to balance the plasticity-stability trade-off. Recent research also explores dynamic modulation of network activity to mitigate catastrophic forgetting. Memory consolidation through episodic replay during sleep has inspired investigations into different forms of data replay. Experimental results demonstrate that integrating these mechanisms into spiking neural networks decreases catastrophic interference, facilitates rapid adaptation to new tasks, and enables continual learning in real-world scenarios. \u003C/p>\u003Cp style=\"text-align:justify;\">As continual learning in spiking networks is still at an early stage, hardware designs in this domain remain relatively underexplored. Neuromorphic accelerators serve as natural substrates for these networks, with the ability to support fine granular run-time reconfigurability of resources. This has motivated research efforts to design custom silicon prototypes. This plenary talk will cover a series of advancements in this area, including digital CMOS accelerators and novel digital architectures that can perform continual learning on-device. Examples include novel spiking hardware architectures integrated with synaptic consolidation mechanisms and neurogenesis. Optimization techniques such as quantization should also be tailored to continual learning mechanisms for a balance of efficacy and efficiency. The presentation will also address how non-volatile memory architectures can draw on the probabilistic memory consolidation by applying a co-design strategy across algorithms, architectures, and circuits. \u003C/p>","2024-09-21T02:10:52.674Z","2025-03-31T15:37:41.969Z","2024-09-21T02:10:54.575Z","269",[1659],{"id":1660,"name":1661,"committee":16,"position":16,"affiliation":1662,"email":16,"biography":44,"createdAt":1663,"updatedAt":1663,"url_path_id":1664,"contactPhoto":1665,"socialLinks":1694,"url_path":1699},186,"Dhireesha Kudithipudi","The University of Texas at San Antonio, USA","2024-09-21T00:52:06.715Z","268",{"id":1666,"name":1667,"alternativeText":16,"caption":16,"width":1668,"height":1668,"formats":1669,"hash":1690,"ext":19,"mime":20,"size":1691,"url":1692,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1693,"updatedAt":1693},199,"Untitled design - 2024-09-21T085045.957.png",1080,{"large":1670,"small":1675,"medium":1680,"thumbnail":1685},{"ext":19,"url":1671,"hash":1672,"mime":20,"name":1673,"path":16,"size":1674,"width":787,"height":787},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/large_Untitled_design_2024_09_21_T085045_957_4e4b9481cc.png","large_Untitled_design_2024_09_21_T085045_957_4e4b9481cc","large_Untitled design - 2024-09-21T085045.957.png",1505.26,{"ext":19,"url":1676,"hash":1677,"mime":20,"name":1678,"path":16,"size":1679,"width":736,"height":736},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_Untitled_design_2024_09_21_T085045_957_4e4b9481cc.png","small_Untitled_design_2024_09_21_T085045_957_4e4b9481cc","small_Untitled design - 2024-09-21T085045.957.png",419.69,{"ext":19,"url":1681,"hash":1682,"mime":20,"name":1683,"path":16,"size":1684,"width":743,"height":743},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/medium_Untitled_design_2024_09_21_T085045_957_4e4b9481cc.png","medium_Untitled_design_2024_09_21_T085045_957_4e4b9481cc","medium_Untitled design - 2024-09-21T085045.957.png",892.38,{"ext":19,"url":1686,"hash":1687,"mime":20,"name":1688,"path":16,"size":1689,"width":751,"height":751},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_Untitled_design_2024_09_21_T085045_957_4e4b9481cc.png","thumbnail_Untitled_design_2024_09_21_T085045_957_4e4b9481cc","thumbnail_Untitled design - 2024-09-21T085045.957.png",56.04,"Untitled_design_2024_09_21_T085045_957_4e4b9481cc",334.15,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/Untitled_design_2024_09_21_T085045_957_4e4b9481cc.png","2024-09-21T00:52:02.955Z",[1695],{"id":1696,"url":1697,"platform":1698},663,"https://klesse.utsa.edu/faculty/profiles/kudithipudi-dhireesha.html","Website","-151","-152",{"id":47,"session":1702},{"id":47,"title":1703,"teaser":1704,"body":1705,"createdAt":1706,"updatedAt":1707,"publishedAt":1708,"url_path_id":1709,"contacts":1710,"url_path":1749},"Quantum Computer on a CMOS Chip","\u003Ch4 class=\"h4\" style=\"margin-left:0px;text-align:justify;\">\u003Cspan style=\"color:rgb(138,36,50);\">\u003Cstrong>Monday | May 26, 2025 | 15:00 - 16:00\u003C/strong>\u003C/span>\u003C/h4>\u003Cp style=\"text-align:justify;\">Quantum computing is a new paradigm that exploits the fundamental principles of quantum mechanics, such as superposition and entanglement, to tackle problems in mathematics, chemistry and material science that are well beyond the reach of supercomputers. Despite the intensive worldwide race to build a useful quantum computer, it is conservatively projected to take decades before reaching the state of useful quantum supremacy. The main challenge is that qubits operate at the atomic level, thus are extremely fragile, and difficult to control and read out. The current commercial state-of-the-art implements a few dozen superconducting qubits in a highly specialized technology and cools them down to a few tens of millikelvin. The high cost of cryogenic cooling and bulky wiring prevents its widespread use. A companion classical electronic controller, needed to control and read out the qubits, is mostly realized with room-temperature laboratory instrumentation. The recent progress with integrating the latter on a CMOS chip and placing it at the 4-kelvin stage within the same cryogenic chamber has made a tremendous progress towards the total system integration, but still it does not even start addressing the basic question of how to scale up to the thousands or millions of qubits needed for practical quantum algorithms. \u003C/p>","\u003Cp style=\"text-align:justify;\">Is there anything we, as IC circuit designers and technologists, can do to break this impasse, other than changing our field completely by, for example, moving to quantum photonics? As a matter of fact, our decades-old tool, the reliable Moore’s law a CMOS scaling, which currently underpins personal computers and mobile phones, has reached the level of maturity and sophistication of being able to handle individual electrons at a temperature of around 1—4 kelvin. The electrons can be housed in single-electron quantum dots where the quantum information (i.e., qubits) can be encoded as charge, i.e., the presence or absence of an electron, or its spin. As to the scaling of up to a million of qubits: Just like with an IC chip, where a single nanometer-sized CMOS transistor can be reliably replicated billions of times to build a digital processor, once the realized qubit structure of a CMOS-compatible quantum dot meets the design rule checker (DRC) of a mainstream commercial IC process, it can be reliably replicated at will to construct a quantum processor. Combined with an on-chip CMOS controller, we could realize a useful quantum computer which can operate at moderate cryogenic temperature of 1—4 kelvin.\u003C/p>\u003Cp>In this talk, we will present an overview of the current progress and discuss future prospects.\u003C/p>","2024-09-20T08:39:01.299Z","2025-01-08T14:01:51.551Z","2024-09-20T08:39:25.921Z","267",[1711],{"id":1139,"name":1712,"committee":16,"position":16,"affiliation":1713,"email":16,"biography":44,"createdAt":1714,"updatedAt":1714,"url_path_id":1715,"contactPhoto":1716,"socialLinks":1744,"url_path":1748},"Bogdan Staszewski","University College Dublin, Ireland","2024-09-20T08:38:40.425Z","266",{"id":1717,"name":1718,"alternativeText":16,"caption":16,"width":1668,"height":1668,"formats":1719,"hash":1740,"ext":19,"mime":20,"size":1741,"url":1742,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1743,"updatedAt":1743},198,"Untitled design - 2024-09-20T163832.061.png",{"large":1720,"small":1725,"medium":1730,"thumbnail":1735},{"ext":19,"url":1721,"hash":1722,"mime":20,"name":1723,"path":16,"size":1724,"width":787,"height":787},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/large_Untitled_design_2024_09_20_T163832_061_7385344bb2.png","large_Untitled_design_2024_09_20_T163832_061_7385344bb2","large_Untitled design - 2024-09-20T163832.061.png",1217.15,{"ext":19,"url":1726,"hash":1727,"mime":20,"name":1728,"path":16,"size":1729,"width":736,"height":736},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_Untitled_design_2024_09_20_T163832_061_7385344bb2.png","small_Untitled_design_2024_09_20_T163832_061_7385344bb2","small_Untitled design - 2024-09-20T163832.061.png",352.07,{"ext":19,"url":1731,"hash":1732,"mime":20,"name":1733,"path":16,"size":1734,"width":743,"height":743},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/medium_Untitled_design_2024_09_20_T163832_061_7385344bb2.png","medium_Untitled_design_2024_09_20_T163832_061_7385344bb2","medium_Untitled design - 2024-09-20T163832.061.png",732.07,{"ext":19,"url":1736,"hash":1737,"mime":20,"name":1738,"path":16,"size":1739,"width":751,"height":751},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_Untitled_design_2024_09_20_T163832_061_7385344bb2.png","thumbnail_Untitled_design_2024_09_20_T163832_061_7385344bb2","thumbnail_Untitled design - 2024-09-20T163832.061.png",46.4,"Untitled_design_2024_09_20_T163832_061_7385344bb2",291.93,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/Untitled_design_2024_09_20_T163832_061_7385344bb2.png","2024-09-20T08:38:36.851Z",[1745],{"id":1746,"url":1747,"platform":1698},662,"https://people.ucd.ie/robert.staszewski","-149","-150",{"id":108,"session":1751},{"id":108,"title":1752,"teaser":1753,"body":44,"createdAt":1754,"updatedAt":1755,"publishedAt":1756,"url_path_id":1757,"contacts":1758,"url_path":1797},"AI Computing Design Trends for LLMs in the Generative AI Era","\u003Ch4 class=\"h4\" style=\"margin-left:0px;text-align:justify;\">\u003Cspan style=\"color:rgb(138,36,50);\">\u003Cstrong>Tuesday | May 27, 2025 | 8:30 - 9:30\u003C/strong>\u003C/span>\u003C/h4>\u003Cp style=\"text-align:justify;\">Large Language Models (LLMs) have demonstrated exceptional performance across numerous generative AI applications, but require large model parameter sizes. These parameters range from several billion to trillions, leading to significant computational demands for both AI training and inference. The growth rate of these computational requirements significantly outpaces advancements in semiconductor process technology. Consequently, innovative IC and system design techniques are essential to address challenges related to computing power, memory, bandwidth, energy consumption, and thermal management to meet AI computing needs.\u003C/p>\u003Cp style=\"text-align:justify;\">In this talk, we will explore the evolution of LLMs in the generative AI era and their influence on AI computing design trends. For AI computing in data centers, both scale-up and scale-out strategies are employed to deliver the huge computational power required by LLMs. Conversely, even smaller LLM models for edge devices demand more resources than previous generations without LLMs. Moreover, edge devices may also act as orchestrators in device-cloud collaboration. These emerging trends will significantly shape the design of future computing architectures and influence the advancement of circuit and system designs.\u003C/p>","2024-09-21T20:46:55.715Z","2025-03-31T15:38:15.174Z","2024-09-21T20:46:57.322Z","271",[1759],{"id":1590,"name":1760,"committee":16,"position":16,"affiliation":1761,"email":16,"biography":44,"createdAt":1762,"updatedAt":1763,"url_path_id":1764,"contactPhoto":1765,"socialLinks":1792,"url_path":1796},"Bor-Sung Liang","MediaTek, Taiwan","2024-09-21T20:46:37.953Z","2024-09-22T08:33:37.949Z","270",{"id":1766,"name":1767,"alternativeText":16,"caption":16,"width":1668,"height":1668,"formats":1768,"hash":1788,"ext":19,"mime":20,"size":1789,"url":1790,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1791,"updatedAt":1791},201,"Untitled design - 2024-09-22T163307.668.png",{"large":1769,"small":1774,"medium":1779,"thumbnail":1784},{"ext":19,"url":1770,"hash":1771,"mime":20,"name":1772,"path":16,"size":1773,"width":787,"height":787},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/large_Untitled_design_2024_09_22_T163307_668_f084d8c311.png","large_Untitled_design_2024_09_22_T163307_668_f084d8c311","large_Untitled design - 2024-09-22T163307.668.png",1573.76,{"ext":19,"url":1775,"hash":1776,"mime":20,"name":1777,"path":16,"size":1778,"width":736,"height":736},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_Untitled_design_2024_09_22_T163307_668_f084d8c311.png","small_Untitled_design_2024_09_22_T163307_668_f084d8c311","small_Untitled design - 2024-09-22T163307.668.png",427.76,{"ext":19,"url":1780,"hash":1781,"mime":20,"name":1782,"path":16,"size":1783,"width":743,"height":743},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/medium_Untitled_design_2024_09_22_T163307_668_f084d8c311.png","medium_Untitled_design_2024_09_22_T163307_668_f084d8c311","medium_Untitled design - 2024-09-22T163307.668.png",927.82,{"ext":19,"url":1785,"hash":1786,"mime":20,"name":1787,"path":16,"size":462,"width":751,"height":751},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_Untitled_design_2024_09_22_T163307_668_f084d8c311.png","thumbnail_Untitled_design_2024_09_22_T163307_668_f084d8c311","thumbnail_Untitled design - 2024-09-22T163307.668.png","Untitled_design_2024_09_22_T163307_668_f084d8c311",475.29,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/Untitled_design_2024_09_22_T163307_668_f084d8c311.png","2024-09-22T08:33:35.580Z",[1793],{"id":1794,"url":1795,"platform":42},664,"https://tw.linkedin.com/in/bliang1","-153","-154",{"id":5,"session":1799},{"id":5,"title":1800,"teaser":1801,"body":1802,"createdAt":1803,"updatedAt":1804,"publishedAt":1805,"url_path_id":1806,"contacts":1807,"url_path":1846},"Delivering Differentiated Designs on Ultra-Low Leakage Technologies: Case Studies For Edge AI, Power Management and Quantum Computing","\u003Ch4 class=\"h4\" style=\"margin-left:0px;text-align:justify;\">\u003Cspan style=\"color:rgb(138,36,50);\">\u003Cstrong>Tuesday | May 27, 2025 | 14:30 - 15:30\u003C/strong>\u003C/span>\u003C/h4>\u003Cp style=\"text-align:justify;\">As the demand for energy-efficient connectivity, embedded memories and better sensing capabilities grows, ultra-low power CMOS technologies such as 22FDX and FinFETs are becoming essential for advancing applications in Edge AI, Power management, and Quantum computing.\u003C/p>\u003Cp style=\"text-align:justify;\">This talk will explore the latest innovations in design and how they are enabling the deployment of sophisticated AI solutions at the edge, when combined with GlobalFoundries's ultra-low power CMOS technologies.\u003C/p>\u003Cp style=\"text-align:justify;\">It will focus on Edge AI Automotive sensors with ADAS 77GHz Radar sensor as an example and how fast transistors, low loss BEOL, power efficiency and low noise are critical to realizing this integrated radar solution for fully autonomous cars and imaging radars.\u003C/p>","\u003Cp style=\"text-align:justify;\">It will then delve into the challenges and solutions in optimizing power usage, including low leakage digital foundational libraries specifically designed for AI chips, eNVM technologies suitable for in-memory computing, advanced power management techniques including low dropout, low noise LDO,  and energy-harvesting approaches that are key for Edge AI devices.\u003C/p>\u003Cp style=\"text-align:justify;\">Additionally, it will discuss the superiority of Fully-depleted SOI technologies in facilitating the next generation of quantum computing, including how such technologies contribute to overcoming current limitations in qubit coherence and scalability.\u003C/p>\u003Cp style=\"text-align:justify;\">By focusing on breakthroughs in device technologies, circuit design, and system architecture, this session will highlight how ultra-low power CMOS technologies are shaping the future of computing at the intersection of low power AI and quantum systems.\u003C/p>","2024-09-20T08:35:31.396Z","2025-03-31T15:38:37.095Z","2024-09-20T08:35:32.981Z","264",[1808],{"id":1809,"name":1810,"committee":16,"position":16,"affiliation":1811,"email":16,"biography":44,"createdAt":1812,"updatedAt":1812,"url_path_id":1813,"contactPhoto":1814,"socialLinks":1842,"url_path":1845},184,"Isabelle Ferain","GlobalFoundries, USA","2024-09-20T08:35:01.689Z","263",{"id":1815,"name":1816,"alternativeText":16,"caption":16,"width":1668,"height":1668,"formats":1817,"hash":1838,"ext":19,"mime":20,"size":1839,"url":1840,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1841,"updatedAt":1841},197,"Untitled design - 2024-09-20T163337.121.png",{"large":1818,"small":1823,"medium":1828,"thumbnail":1833},{"ext":19,"url":1819,"hash":1820,"mime":20,"name":1821,"path":16,"size":1822,"width":787,"height":787},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/large_Untitled_design_2024_09_20_T163337_121_cba19c1bb2.png","large_Untitled_design_2024_09_20_T163337_121_cba19c1bb2","large_Untitled design - 2024-09-20T163337.121.png",1560.34,{"ext":19,"url":1824,"hash":1825,"mime":20,"name":1826,"path":16,"size":1827,"width":736,"height":736},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_Untitled_design_2024_09_20_T163337_121_cba19c1bb2.png","small_Untitled_design_2024_09_20_T163337_121_cba19c1bb2","small_Untitled design - 2024-09-20T163337.121.png",446.99,{"ext":19,"url":1829,"hash":1830,"mime":20,"name":1831,"path":16,"size":1832,"width":743,"height":743},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/medium_Untitled_design_2024_09_20_T163337_121_cba19c1bb2.png","medium_Untitled_design_2024_09_20_T163337_121_cba19c1bb2","medium_Untitled design - 2024-09-20T163337.121.png",943.94,{"ext":19,"url":1834,"hash":1835,"mime":20,"name":1836,"path":16,"size":1837,"width":751,"height":751},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_Untitled_design_2024_09_20_T163337_121_cba19c1bb2.png","thumbnail_Untitled_design_2024_09_20_T163337_121_cba19c1bb2","thumbnail_Untitled design - 2024-09-20T163337.121.png",52.38,"Untitled_design_2024_09_20_T163337_121_cba19c1bb2",417.71,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/Untitled_design_2024_09_20_T163337_121_cba19c1bb2.png","2024-09-20T08:34:05.052Z",[1843],{"id":1415,"url":1844,"platform":42},"https://www.linkedin.com/in/isabelle-ferain-1395a57","-147","-148",{"id":80,"session":1848},{"id":80,"title":1849,"teaser":1850,"body":1851,"createdAt":1852,"updatedAt":1853,"publishedAt":1854,"url_path_id":1855,"contacts":1856,"url_path":1896},"Challenges and Opportunities for Circuit and Systems for Next Generation Satellite Payloads","\u003Ch4 class=\"h4\" style=\"margin-left:0px;text-align:justify;\">\u003Cspan style=\"color:rgb(138,36,50);\">\u003Cstrong>Wednesday | May 28, 2025 | 8:30 - 9:30\u003C/strong>\u003C/span>\u003C/h4>\u003Cp style=\"text-align:justify;\">The evolution of satellite communication systems is increasingly driven by the need for high-performance, flexible, and efficient solutions, particularly in the design and implementation of circuits and systems for next-generation satellite payloads. Software defined payloads leveraging on On-Board Digital Signal Processing (OBP), Multi-Beam Antennas (MBAs) and Beam-Forming Networks (BFNs) are pivotal technologies in addressing the challenges posed by emerging communication standards, such as 5G/6G, as well as advanced satellite communication and remote sensing systems.\u003C/p>","\u003Cp style=\"text-align:justify;\">In the domain of circuits and systems, OBPs, MBAs and BFNs demand intricate designs that integrate cutting-edge advancements in circuit theory, signal processing, and systems engineering. These technologies require sophisticated circuit topologies for flexibility and performance, increasing frequency/bandwidth/speed, and seamless integration of RF/microwave, analogue, and digital technologies. The design of OBPs and BFNs, in particular, poses critical challenges related to interconnectivity, scalability, and adaptability, making it a focal point for ongoing research in the Circuits and Systems community.\u003C/p>\u003Cp style=\"text-align:justify;\">This keynote will explore the critical trade-offs in selecting optimal payload/antenna and OBP/BFN architectures, and recent developments considering both theoretical and technological perspectives. Emphasis will be placed on the synergy between payload/antenna design and microwave/digital circuit performance, particularly the impact of system-level parameters on complexity and performance, such as degree of flexibility, power efficiency, modularity, etc…\u003C/p>\u003Cp style=\"text-align:justify;\">With the growing interdisciplinary interest from various sectors such as satellite communications, remote sensing and navigation, the keynote will provide a comprehensive overview of the state-of-the-art in satellite payload design. Special focus will be given to the opportunities for innovation in circuits and systems, addressing the unique needs of future satellite payloads.\u003C/p>\u003Cp style=\"text-align:justify;\">Building on decades of experience in satellite payload development and addressing the challenges of next-generation systems, this keynote will offer insights for engineers, researchers, and industry professionals of the IEEE Circuits and Systems Society, aiming to deepen their understanding and stimulate their active contributions to the cutting edge of space technology innovation.\u003C/p>","2024-10-12T16:50:28.770Z","2025-03-31T15:38:58.847Z","2024-10-12T16:50:31.176Z","276",[1857],{"id":1858,"name":1859,"committee":16,"position":16,"affiliation":1860,"email":16,"biography":44,"createdAt":1861,"updatedAt":1861,"url_path_id":1862,"contactPhoto":1863,"socialLinks":1891,"url_path":1895},189,"Piero Angeletti","European Space Agency (ESA), The Netherlands","2024-10-12T16:49:17.806Z","275",{"id":1864,"name":1865,"alternativeText":16,"caption":16,"width":1668,"height":1668,"formats":1866,"hash":1887,"ext":19,"mime":20,"size":1888,"url":1889,"previewUrl":16,"provider":23,"provider_metadata":16,"createdAt":1890,"updatedAt":1890},215,"Untitled design - 2024-10-12T124653.344.png",{"large":1867,"small":1872,"medium":1877,"thumbnail":1882},{"ext":19,"url":1868,"hash":1869,"mime":20,"name":1870,"path":16,"size":1871,"width":787,"height":787},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/large_Untitled_design_2024_10_12_T124653_344_6197163dc4.png","large_Untitled_design_2024_10_12_T124653_344_6197163dc4","large_Untitled design - 2024-10-12T124653.344.png",1653.64,{"ext":19,"url":1873,"hash":1874,"mime":20,"name":1875,"path":16,"size":1876,"width":736,"height":736},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/small_Untitled_design_2024_10_12_T124653_344_6197163dc4.png","small_Untitled_design_2024_10_12_T124653_344_6197163dc4","small_Untitled design - 2024-10-12T124653.344.png",500.41,{"ext":19,"url":1878,"hash":1879,"mime":20,"name":1880,"path":16,"size":1881,"width":743,"height":743},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/medium_Untitled_design_2024_10_12_T124653_344_6197163dc4.png","medium_Untitled_design_2024_10_12_T124653_344_6197163dc4","medium_Untitled design - 2024-10-12T124653.344.png",1018.61,{"ext":19,"url":1883,"hash":1884,"mime":20,"name":1885,"path":16,"size":1886,"width":751,"height":751},"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/thumbnail_Untitled_design_2024_10_12_T124653_344_6197163dc4.png","thumbnail_Untitled_design_2024_10_12_T124653_344_6197163dc4","thumbnail_Untitled design - 2024-10-12T124653.344.png",62.15,"Untitled_design_2024_10_12_T124653_344_6197163dc4",404.65,"https://confcats-siteplex.s3.us-east-1.amazonaws.com/iscas25/Untitled_design_2024_10_12_T124653_344_6197163dc4.png","2024-10-12T16:48:10.098Z",[1892],{"id":1893,"url":1894,"platform":42},666,"https://nl.linkedin.com/in/piero-angeletti-4baa6545","-51","-157",{"data":1898,"meta":1899},{"id":238,"heading":233,"createdAt":239,"updatedAt":240,"publishedAt":241,"url_path_id":242,"url_path":245,"contentType":78},{},1778852848907]